Hitachi IC35L060AVV207 Datasheet download pdf (Page 52)

6.2.5 Addressing of registers

The host addresses the drive through a set of registers called the Task File. These registers are mapped

into the I/ O space of the host. Two chip select lines (CS0– and CS1–) and three address lines (DA0-02)

are used to select one of these registers, while a DIOR– or DIOW– is provided at the specified time.

The CS0– is used to address Command Block registers. while the CS1– is used to address Control Block

registers.

The following table shows the I/ O address map.

Device control Reg.Alt. Status Reg.01101

Control Block Registers

Command Reg. Status Reg. 11110

Drive/Head Reg.Drive/Head Reg.01110

Cylinder high Reg.Cylinder high Reg.10110

Cylinder low Reg.Cylinder low Reg.00110

Sector number Reg.Sector number Reg.11010

Sector count Reg.Sector count Reg.01010

Features Reg.Error Reg.10010

Data Reg.Data Reg.00010

Command Block Registers

DIOW– = 0 (Write)DIOR– = 0 (Read)DA0DA1DA2CS1–CS0–

Figure 43. I/O address map

Note: "Addr" field is shown as an example.

During DMA operation (from writing to the command register until an interrupt) not all registers are acces-

sible. For example, the host is not supposed to read status register contents before interrupt (the value is

invalid).

6.2.6 Cabling

The maximum cable length from the host system to the drive plus circuit pattern length in the host system

shall not exceed 18 inches.

For higher data transfer application (>8.3 MB/s) a modification in the system design is recommended to

reduce cable noise and cross-talk, such as a shorter cable, bus termination, or a shielded cable.

For systems operating with Ultra DMA mode 3, 4, and 5, 80-conductor ATA cable assembly (SFF-8049)

shall be used.

Deskstar 180GXP hard disk drive specifications

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Hitachi IC35L060AVV207 Datasheet Page 52