Hitachi IC35L060AVV207 Datasheet Page 190
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85H Disable Advanced Power Management
86H Disable Power-up in Standby mode
89H Disable Address Offset mode
AAH Enable read look-ahead feature
BBH 4 bytes of ECC apply on Read Long/Write Long commands
C2H Disable Automatic Acoustic Management
CCH Enable reverting to power on defaults
DDH Disable release interrupt
Note: After a power on reset of hard reset the device is set to the following features as default:
Write cache : Enable
ECC bytes : 4 bytes
Read look-ahead : Enable
Reverting to power on defaults : Disable
Release interrupt : Disable
11.37.1 Set Transfer mode
When Feature register is 03h (= Set Transfer mode), the Sector Count Register specifies the transfer
mechanism. The upper 5 bits defines the type of transfer and the low order 3 bits encodes the mode
value.
PIO Default Transfer Mode 00000 000
PIO Default Transfer Mode, Disable IORDY 00000 001
PIO Flow Control Transfer Mode x 00001 nnn (nnn=000,001,010,011,100)
Multiword DMA mode x 00100 nnn (nnn=000,001,010)
Ultra DMA mode x 01000 nnn (nnn=000,001,010,011,100,101)
11.37.2 Write Cache
If the number of auto reassigned sectors reaches the reassignment capacity of the device, the write
cache function will automatically be disabled. Although the device still accepts the Set Features com-
mand with Feature register = 02h without error, the write cache function remains disabled. For current
write cache function status refer to Figure 101 "Identify Device Information" (word 85 or 129) on page
121.
11.37.3 Advanced Power Management
When the value in the Feature register is 05h (= Enable Advanced Power Management), the Sector
Count Register specifies the Advanced Power Management level.
Aborted00H
The lowest power consumption mode is Low RPM standby mode01 - 7Fh
The lowest power consumption mode is Low power Idle mode80 - BFh
The deepest Power Saving mode is Normal Idle mode (the same as Disable
Advanced Power Management
C0 - FEh
AbortedFFH
Deskstar 180GXP hard disk drive specifications
176
- Deskstar 180 GXP 1
- Table of contents 5
- List of figures 11
- 1.0 General 15
- 2.0 General features 17
- 3.1 Control Electronics 21
- 3.2 Head disk assembly 21
- 3.3 Actuator 21
- 4.0 Drive characteristics 23
- 4.2 Data sheet 24
- 4.3 Drive organization 25
- 4.4.1 Command overhead 26
- 4.4.2 Mechanical positioning 26
- Figure 7. Head switch time 27
- 4.4.3 Drive ready time 28
- 4.4.4 Data transfer speed 29
- 4.4.5 Throughput 30
- 4.4.6 Operating modes 30
- Operating mode descriptions 30
- 5.0 Defect flagging strategy 33
- 6.0 Specification 35
- 6.1.2 Signal definition 36
- 6.2 Signal timings 40
- 6.2.2 PIO timings 41
- 6.2.3 Multiword DMA timings 43
- 6.2.4 Ultra DMA timings 44
- HDMARDY– is negated 45
- 6.2.4.5 Initiating Write DMA 48
- DDMARDY– is negated 49
- 6.2.5 Addressing of registers 52
- 6.2.6 Cabling 52
- 6.3 Jumper settings 53
- 6.3.4.4 Power Up In Standby 58
- 6.4 Environment 59
- Nonoperating 60
- Operating 60
- 6.5 DC power requirements 61
- 6.6 Reliability 64
- 6.7 Mechanical specifications 65
- BREATHER HOLE 66
- 6.7.2 Hole locations 67
- 6.7.3Connector locations 68
- 6.7.4 Drive mounting 68
- 6.8 Vibration and shock 69
- 6.8.3 Operating shock 70
- 6.8.4 Nonoperating shock 70
- 6.9 Acoustics 71
- 6.10 Identification labels 72
- 6.11 Safety 73
- 6.12.1 CE Mark 74
- 6.12.2 C-Tick Mark 74
- 7.0 General 77
- Deviations from standard 77
- 8.0 Registers 79
- 8.2 Command Register 80
- 8.3 Cylinder High Register 80
- 8.4 Cylinder Low Register 80
- 8.5 Data Register 81
- 8.6 Device Control Register 81
- 8.7 Drive Address Register 81
- 8.8 Device/Head Register 82
- 8.9 Error Register 82
- 8.10 Features Register 83
- 8.11 Sector Count Register 83
- 8.12 Sector Number Register 83
- 8.13 Status Register 84
- 9.0 General operation 85
- 9.1.1 Register initialization 86
- 9.3 Sector Addressing Mode 88
- 9.5 Power management feature 90
- Figure 79. Power conditions 91
- 9.6 S.M.A.R.T. function 92
- 9.6.8 Self-test 93
- 9.7 Security Mode Feature Set 94
- 9.7.4 Operation example 95
- Figure 81. Usual Operation 96
- 9.7.4.4 User Password Lost 97
- 9.7.5 Command table 98
- 9.8.2 Security extensions 101
- 9.9 Seek Overlap 102
- 9.10 Write cache function 103
- 9.11 Reassign function 103
- 9.15 Address Offset Feature 105
- 9.15.2 Identify Device Data 106
- 10.0 Command Protocol 109
- 10.1 PIO Data In commands 110
- 10.2 PIO Data Out commands 112
- 10.3 Non-data commands 114
- 10.4 DMA commands 116
- 10.5 DMA queued commands 117
- 11.0 Command descriptions 119
- (subcommand C1h) 125
- 11.4 Flush Cache (E7h) 129
- 11.5 Flush Cache Ext (EAh) 130
- 11.6 Format Track (50h) 131
- 11.7 Format Unit (F7h) 133
- 11.8 Identify Device (ECh) 134
- 11.9 Idle (E3h/97h) 141
- 11.12 NOP (00h) 144
- 11.13 Read Buffer (E4h) 145
- 11.14 Read DMA (C8h/C9h) 146
- 11.15 Read DMA Ext (25h) 148
- Read DMA Ext Command (25h) 148
- 11.16 Read DMA Queued (C7h) 150
- 11.18 Read Log Ext (2Fh) 154
- BytesDescription 155
- 11.18.2.1 Error log version 156
- 11.18.2.2 Error log index 156
- 11.18.2.4 Device error count 158
- 11.19 Read Long (22h/23h) 161
- 11.20 Read Multiple (C4h) 163
- 11.21 Read Multiple Ext (29h) 165
- 11.28 Recalibrate (1xh) 177
- 11.34 Security Unlock (F2h) 185
- 11.35 Seek (7xh) 187
- 11.36 Service (A2h) 188
- 11.37 Set Features (EFh) 189
- 11.37.1 Set Transfer mode 190
- 11.37.2 Write Cache 190
- Software Resets 192
- 11.38 Set Max Address (F9h) 193
- Figure 151. Set Max Lock 196
- 11.40 Set Multiple (C6h) 201
- 11.41 Sleep (E6h/99h) 202
- 11.42.1 S.M.A.R.T. Subcommand 204
- ByteDescription 208
- 11.42.4 SMART Log Directory 213
- 11.42.5.2 Error log index 214
- 11.42.5.3 Device error count 214
- 11.42.7 Error reporting 218
- 11.43 Standby (E2h/96h) 219
- 11.45 Write Buffer (E8h) 222
- 11.46 Write DMA (CAh/CBh) 223
- 11.47 Write DMA Ext (35h) 225
- 11.50 Write Log Ext (3Fh) 231
- 11.51 Write Long (32h/33h) 233
- 11.52 Write Multiple (C5h) 235
- 12.0 Timings 243
- Addressing of registers, 38 245
- Technologies 247
- DeskstarTM is a trademark of 247
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